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| Z86L9900100ZEM Z86L99 ICEBOX User Manual UM005100-IRR0400 ZiLOG WORLDWIDE HEADQUARTERS * 910 E. HAMILTON AVENUE * CAMPBELL, CA 95008 TELEPHONE: 408.558.8500 * FAX: 408.558.8300 * WWW.ZILOG.COM This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to request copies of publications, contact ZiLOG Worldwide Headquarters 910 E. Hamilton Avenue Campbell, CA 95008 Telephone: 408.558.8500 Fax: 408.558.8300 www.ZiLOG.com Windows is a registered trademark of Microsoft Corporation. Document Disclaimer (c) 2000 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval ZiLOG, use of information, devices, or technology as critical components of life support systems is not authorized. No licenses or other rights are conveyed, implicitly or otherwise, by this document under any intellectual property rights. Follow the precautions listed below to avoid permanent damage to the emulator. I. Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). II. Power-Up Precautions. 1. 2. Ensure that all power to the emulator and the target application (if any) is turned OFF. Connect the target pod to the target application (if any). ii UM005100-IRR0400 Electrical Safeguards Follow the precautions listed below to avoid permanent damage to the emulator. I. Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). II. Power-Up Precautions. 3. 4. 5. 6. Ensure that all power to the emulator and the target application (if any) is turned OFF. Connect the target pod to the target application (if any). Power up the emulator, then press the RESET button. Power up the target application (if any). III Power-Down Precautions. When powering down, follow this procedure in the precise order shown below: 1. 2. 3. Power down the target application board (if any). Remove the target pod. Power down the emulator. NOTES: 1. Refer to the OPrecaution ListO section of the Product Information sheet for additional operating precautions specific to various devices. 2. 3. Do not leave the emulator powered up with the RS-232C cable connected to a powered-down PC. Before inserting target pod into target application board, refer to Chapter 2 to determine appropriate jumper selections and options. UM005100-IRR0400 iii Z86L99 ICEBOX USER'S MANUAL PREFACE ABOUT THIS MANUAL We recommend that you read and understand everything in this manual before setting up and using the product. However, we recognize that users have different styles of learning. Therefore, we have designed this manual to be used either as a how-to procedural manual or a reference guide to important data. The following conventions have been adopted to provide clarity and ease of use: * Universe Medium 10-point all-caps is used to highlight to the following items: - - - - - - - - commands , displayed messages menu selections, pop-up lists, button, fields, or dialog boxes modes pins and ports program or application name instructions, registers, signals and subroutines an action performed by the software icons bit software code file names and paths hexadecimal value * Courier Regular 10-point is used to highlight the following items - - - - * Grouping of Actions Within A Procedure Step Actions in a procedure step are all performed on the same window or dialog box. Actions performed on different windows or dialog boxes appear in separate steps. UM005100-IRR0400 Z86L99 ICEBOX USER'S MANUAL TABLE OF CONTENTS Chapter Title and Subsections Page Chapter 1 Introduction OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 EMULATOR FEATURES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 EMULATOR LIMITATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 SUPPORTED ZILOG DEVICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 HARDWARE SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . POWER REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SERIAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1-3 1-3 1-4 GUI-SUPPORTED COMPILER, ASSEMBLER FORMATS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 KIT CONTENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 ADDITIONAL ITEMS NOT SUPPLIED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 OPTIONAL RECOMMENDED ITEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 COMPUTER REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 MINIMUM REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 CONTACTING ZILOG CUSTOMER SUPPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 UM005100-IRR0400 vii Chapter Title and Subsections Page Chapter 2 Set-Up and Installation HARDWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 QUICK INSTALLATION INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 COMPLETE INSTALLATION INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 SOFTWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 EMULATOR OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 RESETTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 LED OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 JUMPER SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 DIP SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 PERFORMING OTP PROGRAMMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14 Chapter 3 Overview EMULATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 USING ZDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 SELECT THE EMULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 OPEN A PROJECT AND ADD FILES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 AVAILABLE DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Appendix A Troubleshooting Guide INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 COUNTER JUMPS TO UNEXPECTED ADDRESS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 ZDS ERROR MESSAGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3 CAN NOT OPEN WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3 OUT OF SYNCHRONIZATION WITH THE EMULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3 Appendix B Problem/Suggestion Report Form Glossary Index viii UM005100-IRR0400 Z86L99 ICEBOX USER'S MANUAL LIST OF TABLES Table TABLE 1-1 TABLE 2-1 TABLE 2-2 TABLE 2-3 TABLE 3-1 Page SUPPORTED PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 JUMPER SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 DIP SETTINGS TO SET PULL-UP RESISTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 UM005100-IRR0400 ix Z86L99 ICEBOX USER'S MANUAL LIST OF FIGURES Figure Page FIGURE 2-1 EMULATOR CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 FIGURE 2-2 J6 JUMPER SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 FIGURE 2-3 Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 FIGURE 2-4 FRONT LED ASSIGNMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 FIGURE 3-1 NEW PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 FIGURE 3-2 EMULATOR CONFIGURATION DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 FIGURE 3-3 PROJECT VIEWER WINDOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 FIGURE 3-4 INSERT FILES INTO PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 FIGURE 3-5 PROJECT VIEWER WINDOW WITH FILE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 UM005100-IRR0400 xi Z86L99 ICEBOX USER'S MANUAL CHAPTER 1 INTRODUCTION OVERVIEW Congratulations for selecting a fine development tool! The Z86L9900100ZEM ICEBOX is ZiLOG's in-circuit emulator providing emulation for the Z8 family of IR controllers. The emulator is also capable of OTP programming for the family being emulated. The emulator consists of an emulation daughter board that is plugged into a 64K motherboard via P1 and P2 headers. The Z86D99 ICE chip is used as the emulation processor on the daughter board. The motherboard provides host communication interface, control processor, I/O space decoding and LED indicators. The emulator is designed to be used with ZiLOG Developers Studio, giving the user a total package to write, edit and debug their applications. UM005100-IRR0400 1-1 Emulator Features Introduction EMULATOR FEATURES Key features of the Z86L9900100ZEM ICEBOX include: * * * * * * * * * Supports up to 32K of ROM Vary the operating voltage from 3.0-4.0V Supports in-circuit emulation on target systems that operate from 3.0-4.0V The user can choose to power the ICE chip from either the emulator or target board Supports IR devices that operate up to 8MHz Emulates 28 and 40-pin DIP and 28-pin SOIC OTP programming for 28 pin DIP and 28 pin SOIC, 40 pin DIP packages Emulates and supports all the features and functions for a specified Z8 IR microcontroller Multitasking allows the user to use other Windows applications while ZiLOG Developer Studio (ZDS) is running EMULATOR LIMITATIONS The Z86D99 ICE chip's ROM/ROMLESS pin is used to configure the ICE CHIP for 32K of internal ROM. This configuration affects the Z86L9900100ZEM ICEBOX in the following ways: * * Will not support emulation of a ROMLESS operation mode If the host software specifies that a device has between 4K to 32K of ROM the emulator operates as if it is emulating a device with 32K of ROM To emulate pull-up transistors for their target board, you must manually set the emulator's pull-up resistor dip switches. See page 2-12 for the proper settings of the emulator's dip switches. NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower voltage may cause an increase in resistance. 1-2 UM005100-IRR0400 Introduction Supported ZiLOG Devices SUPPORTED ZILOG DEVICES Table 1-1 shows the products supported by the Z86L9900100ZEM ICEBOX: TABLE 1-1. SUPPORTED PRODUCTS Packages Emulation 28 PDIP Z86L991PZ008SC OTP Z86D991 PZ008SC Z86D991 SZ008SC Required accessories 28 PDIP emulation pod 28 PDIP program platform (PC ASSY#99C0667-001) 28 PDIP emulation pod and a DIP to SOIC conversion adapter from Emulation Technology (AS-DIP 6-028-S003-1 or AS-DIP-6028-S003-2) 28 SOIC program platform (PC ASSY#99C0668-001) 40 PDIP emulation pod 40 PDIP program platform (PC ASSY#990716-001) Rev. B Accessories for the 48 pin SSOP will be available the 4th quarter of 2000 28 SOIC Z86L991SZ008SC 40 PDIP Z86L990PZ008SC Z86D990 PZ008SC Z86D990 HZ008SC 48 SSOP N/A HARDWARE SPECIFICATIONS OPERATING CONDITIONS Operating Humidity: Operating Temperature: Clocks: Serial Baud Rate: 10%-90% RH (Non condensing) 20C 10C The control processor operates at 7.3728 Mhz, the emulation processor operates at 8Mhz 57,600 bps POWER REQUIREMENTS This emulator requires an external 5VDC power supply. Operating Voltage (Input): Operating Voltage (Target): Operating Current: +4.75 VDC to +5.25 VDC Max (+5.0 VDC typical) +3.0 VDC to +4.0 VDC Max 0.8A typical 1.5A MAX UM005100-IRR0400 1-3 GUI-Supported Compiler, Assembler Formats Introduction SERIAL INTERFACE ZiLOG Developer Studio communicates with theZ86L9900100ZEM ICEBOX using a DB25, RS-232 and DCE cable (TxD, RxD only). GUI-SUPPORTED COMPILER, ASSEMBLER FORMATS The Emulator supports object (binary or Intel hex) code files produced by ZiLOG Developer Studio (ZDS), ZiLOG Macro Cross Assembler (ZMASM). KIT CONTENTS The emulator kit contains one each of the following items: * * * * * * * * * * Z86L9900100ZEM ICEBOX Z86D991 40 PDIP program platform ZiLOG PC: 99C0716-001 Z86D991 28 PDIP program platform ZiLOG PC: 99C0667-001 Z86D991 28 SOIC program platform ZiLOG PC: 99C0668-001 40 PDIP emulation pod with cable ZiLOG PC: 99C0206-001 28 PDIP emulation pod with cable ZiLOG PC: 99C0217-001 5V Power Cable with banana plugs RS-232 Serial Cable, 9-pin M-F ZiLOG Developer Studio Installation CD Z86L99 ICEBOX User's Manual ADDITIONAL ITEMS NOT SUPPLIED The following items are required but are not currently supplied in the emulator kit: * A source of power (+5VDC typical) for the emulator. This can be a laboratory power supply with current rating of at least 1.5 ampere. 1-4 UM005100-IRR0400 Introduction Computer Requirements OPTIONAL RECOMMENDED ITEM The following items are recommended: * * * * Your target design. Typically this is a wire-wrapped or printed circuit prototype that includes a socket for the target device which the emulator cable/pod plugs into. Z8 C-Compiler Oscilloscope Logic Analyzer COMPUTER REQUIREMENTS MINIMUM REQUIREMENTS IBM PC (or 100-percent compatible) Pentium-Based Machine 75 MHz 16 MB RAM VGA Video Adapter Hard Disk Drive (12 MB free space) CD-ROM Drive (a CD-ROM drive is not needed if you download ZDS from the web at www.zilog.com) RS-232 COM Port Mouse or Pointing Device Microsoft Windows 95/98/NT The following enhancements to the minimum requirements are recommended: 166MHz IBM PC SVGA video adapter UM005100-IRR0400 1-5 Contacting ZiLOG Customer support Introduction CONTACTING ZILOG CUSTOMER SUPPORT ZILOG has a worldwide customer support center located in Austin, Texas. The customer support center is open from 7 a.m. to 7 p.m. Central Time. The customer support toll-free number for the United States and Canada is 1-877-ZiLOGCS (1-877-945-6427). For calls outside of the United States and Canada dial 512-306-4169. The FAX number to the customer support center is 512-306-4072. Customers can also access customer support via the website at: * * For customer service - http://register.zilog.com/login.asp?login=servicelogin For technical support- http://register.zilog.com/login.asp?login=supportlogin For valuable information about hardware and software development tools go to ZiLOG home page at http://www.zilog.com. The latest released version of the ZDS can be downloaded from this site. 1-6 UM005100-IRR0400 Z86L99 ICEBOX USER'S MANUAL CHAPTER 2 SET-UP AND INSTALLATION HARDWARE INSTALLATION Before installing the hardware, refer to Figure 2-1 for a diagram on connecting the emulator to a PC and power supply; Figure 2-3 provides option jumper locations. QUICK INSTALLATION INSTRUCTIONS To install the hardware utilizing a 5VDC wall-adaptor power supply, perform the following. 1. Set the correct jumper setting for powering the ICE chip and target board. See Emulator connection on page 2-2. 2. Plug a 5.0 VDC 1.5 Amp Wall Power Adaptor to the power connector on the Z86L9900100ZEM ICEBOX. 3. Turn on the power supply and ensure that it is set to + 5.0V and current limited at 2.5A. 4. Connect the serial cable to the PC. 5. Connect the emulator to the target board (if performing in-circuit emulation). 6. Set up the oscillator and option jumpers. 7. Power up the Z86L9900100ZEM. UM005100-IRR0400 2-1 Hardware Installation Set-Up and Installation COMPLETE INSTALLATION INSTRUCTIONS The following procedures illustrate a complete step-by-step guide on installing the emulator. -+ FIGURE 2-1. EMULATOR CONNECTION Set Power Jumper The Z86L9900100ZEM ICEBOX allows the user to power the emulator and target from a variety of different sources. Before powering the emulator the user should select their power configuration. CAUTION! The user must choose their power source before powering the emulator. Before selecting a power source study Figure 2-2, which shows a schematic of the J6 power jumper. Failure to properly configure the power source will result in damage to the emulator or target. 2-2 UM005100-IRR0400 Set-Up and Installation Hardware Installation The user should choose from one of the below options when selecting their power source * * * * Jumper pin 1 to pin 3 and pin 2 to pin 4 to power both the ICE chip and target from the emulator's adjustable voltage regulator (default setting) Jumper pin 1 to pin 3 to power the ICE chip with the emulator's adjustable regulator Jumper pin 2 to pin 4 to power target with the emulator's adjustable regulator Jumper pin 3 to pin 4 to power the ICE chip from the target CAUTION! When powering the target from the emulator ensure that the target's power supply is disconnected . Emulator Adjustable Voltage Regulator 1 3 2 4 ICE chip Target 5 7 6 8 Voltage Digital to Analog Converter FIGURE 2-2. J6 JUMPER SCHEMATIC UM005100-IRR0400 2-3 Hardware Installation Set-Up and Installation RS-232C J6 Power Debug pins Reset Logic analyzer connector Voltage adjuster J2 J1 OTP programing interface J4 J3 P3 JP1 Ice Chip S5 J5 S4 S2 Oscillator On 12345678 On 12345678 On 12345678 On S1 S6 12345678 On 12345678 JP2 Target Pod P6 Target Pod P5 JP4 JP3 J8 J7 LEDS FIGURE 2-3. Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW 2-4 UM005100-IRR0400 Set-Up and Installation Connect the Power Supply Hardware Installation 1. If the power supply provides voltage adjustment: * * Turn the power supply on and adjust it to +5V Adjust the setting adjustment for at least 2.5A, if there is a current-limiting adjustment. 2. Turn the power supply off. 3. Locate the power cable (red wire, black wire, and banana plugs on the other end). Plug in the black banana plug into the black jack on the power supply (labeled COM, GND, or with the ground symbol). Plug the red plug into the red jack on the power supply (labeled +, +V or +5V). 4. Plug the white connector on the other end of the cable into the matching 4-pin connector on the back side of the emulator. (This connection is keyed to ensure against an improper connection.) NOTE: The ZiLOG Power Supply Accessory Kit (ZPS05V00ZAC), which is sold separately, provides a fixed-5V Universal Output Power Supply, accepts 110V to 220V AC input, and includes a power cable and an in-line jack cable. CAUTION! Always check the supply voltage before plugging in the power cord. Connect the Serial Cable to the PC Locate the serial cable. Connect the male end to the female connector on the back of the ICEBOX, and the female end to either the COM1, COM2, COM3, or COM4 connector of the host PC. NOTE: If connector availability is limited to a 9-pin COM1 through COM4, then use either a different cable or a 25-pin to 9-pin converter. (Available at any electronics store for a nominal fee.) UM005100-IRR0400 2-5 Hardware Installation Connect to the Design Set-Up and Installation Connect to the target design by performing the following steps: 1. Locate the emulation cable for the device. CAUTION! Wear a properly grounded wrist strap or similar ESD protection before continuing. 2. Plug the cable into the target device. Ensure that the pin 1 marking (as indicated by the red mark on the ribbon cable) matches pin 1 on the target board. 3. Plug the other end of the cables into target pod on top of the emulator. See Figure 2-3 for the location of the target pod. 4. Select the power source for the Z86D99 ICE chip by configuring the J6 jumper. See Table 2-2 for more information on jumper settings and Figure 2-3 for the location of the J6 jumper. 5. Select either the supplied 8MHz oscillator or the target's oscillator to clock the ICE chip. See Jumper settings on page 2-10 for more information on how to configure the emulator to use the target boards oscillator. CAUTION! The user can not run the emulator's oscillator if the target oscillator or XTAL is connected. At this time use one of the following methods to set the ICE-chip's clock: * * To use the emulators oscillator remove the target's oscillator and connect pin 2 to pin 3 on the J5 jumper To Use the target's oscillator and connect pin 1 to pin 2 on the J5 jumper and remove the ICEBOX's 8 MHz oscillator located at Y1. 2-6 UM005100-IRR0400 Set-Up and Installation Adjust the voltage Hardware Installation If the emulator is powered by its adjustable regulator then the voltage must be manually set. Set the emulator voltage by performing the following steps: CAUTION! If the target and emulator are using separate power supplies then the ICE chip voltage must be adjusted to match the target's device voltage. Failure to match the target devices voltage with the ICE chip's voltage could result in damage to the emulator, target device or ICE chip. 1. Locate the voltage adjuster on top of the emulator. See Figure 2-3 for the location of the voltage adjuster. 2. Attach the voltmeter lead to either pin 1 or pin 2 on the J6 jumper and ground. 3. Apply power to the emulator with the target device disconnected. 4. Turn the voltage adjuster's screw until the voltmeter read-out matches the target device output voltage. Connect Logic Analyzer (Optional) The logic analyzer can either be connected as part of the initial setup, or later as the user continues working with their design. Connect to a logic analyzer by performing the following steps: 1. Locate the cable for the logic analyzer. NOTE: Wear a properly grounded wrist strap or similar ESD protection before continuing. 2. Plug the logic analyzer into the ZiLOG logic analyzer adapter (sold separately from the Z86L9900100ZEM ICEBOX kit). NOTE: The logic analyzer adapter can be ordered from customer support by requesting part number 98C0289-001. 3. Plug the cable from the ZiLOG logic analyzer adapter into the emulator. Ensure that the pin 1 marking (as indicated by the red mark on the ribbon cable) matches the pin 1 on the target board. See Figure 2-3 for the location of the logic analyzer connector. UM005100-IRR0400 2-7 Software Installation Power the Emulator Set-Up and Installation If anything unusual (such as an unexpected sound and/or smell occurs when turning on the power supply, turn off the power supply and check the setting for the J6 jumper. See Emulator connection on page 2-2. If the power supply allows voltage adjustment, adjust it again to +5V. (It may be somewhat lower than +5V because of the emulator load. After power-up, press the RESET button to reset the ICE chip. (Pressing the RESET button avoids bus contention on the I/O lines.) If the emulator is not powering your design through the VCC pin, turn on the power supply of the design. CAUTION! If your design already has a power supply, do not power your design from the emulator V CC pin. When powering down, follow the procedure described below: 1. Power down the target application board (if using the target power supply). 2. Power down the emulator. NOTE: Refer to the complete Electrical Safeguards information shown on the inside cover of this man- ual. SOFTWARE INSTALLATION For more information on installing ZDS refer to the user manual PDF that is included on the installation CD-ROM or download ZDS literature from the ZiLOG web page at zilog.com. EMULATOR OPERATION The following topics guide the user on how to operate the emulator and configure jumper settings. RESETTING Press the RESET button on the emulator to reset the state of the target device and the status that was established using ZDS. For example, the emulator sets the program counter to %000C. After reset, wait until the Ready LED is ON and has finished blinking before starting ZDS. Refer to the LED Operation section of this chapter for more details. NOTE: Always press the RESET button on the emulator before starting ZDS. 2-8 UM005100-IRR0400 Set-Up and Installation Emulator Operation LED OPERATION ZiLOG emulators use LEDs to communicate the different hardware states. The following table gives a description of the LEDs. The Z86L9900100ZEM LED's are located on the right front of the emulator. FIGURE 2-4. FRONT LED ASSIGNMENTS LED READY RUN OTP PWR Indication On Off On Off On Off On Off Blink Description Communicating in Bisync Mode and waiting for command Communicating in ASCII Mode or executing Bisync command Running user code Not running user code The Emulator is performing OTP programing The Emulator is not performing OTP programming Emulator is powered up and Self Test is completed Power is off Emulator is self-testing UM005100-IRR0400 2-9 Emulator Operation Set-Up and Installation JUMPER SETTINGS The following table lists jumper setting that the are easily configured by the user. See Figure 2-3 for the jumper locations. TABLE 2-1. JUMPER SETTINGS Jumper Pin J1 J2 J3 J4 J6 J6 J6 N/A N/A 1-2 1-2 1-3 2-4 5-7 Position Out (Default) Out (Default) Out (Default) Out (Default) In (Default) In (Default) In Description OTP programming adapter pins OTP programming adapter pins Reserved for data memory (do not use) Reserved for external memory (do not use) ICE chip is powered by the emulator's adjustable regulator Target is powered by emulator's adjustable regulator ICE chip is powered by a programmable regulator (The programmable regulator is currently not supported . Contact ZiLOG customer support to see if the programmable regulator has been released .) J6 J7 4-6 N/A In Open (Default) Target is not powered by emulator (See Emulator connection on page 2-2 for more information) Do not Jumper, jumping these pins will short port 4 pin 3 VCC! These two pins are used as a connector for the port 4 pin 3 IR LED. Connects Ports 4 pin 3 to target Disconnects ports 4 pin 3 from target Disable Vbo Enable Vbo AVDD to VDD core Target board will supply power to AVDD (a 40 pin part is being emulated) A 28 pin part is being emulated VCC_I isolates from AVDD (use internal filter) Cap's to AVDD N/A J8 J8 JP1 JP1 JP2 JP2 JP3 JP3 JP4 JP4 1-2 1-2 1-2 1-2 1-2 1-2 1-2 1-2 1-2 1-2 In (Default) Out In Out (Default) In (Default) Out In Out (Default) In (Default) Out 2-10 UM005100-IRR0400 Set-Up and Installation TABLE 2-1. JUMPER SETTINGS (CONTINUED) Jumper Pin J1 JP5 JP5 N/A 1-2 2-3 Position Out (Default) In In * (Default) Description Emulator Operation OTP programming adapter pins ICE chip uses target oscillator/clock (see Note at the bottom of the table) ICE chip uses emulator oscillator/clock (see Note at the bottom of the table) NOTE: The user can not run the emulator's oscillator if the target oscillator or XTAL is connected. At this time use one of the following methods to set the ICE-chip's clock: * * To use the emulators oscillator remove the target's oscillator and connect pin 2 to pin 3 on the J5 jumper To use the target's oscillator and connect pin 1 to pin 2 on the J5 jumper Setting Jumpers for Targets For all targets ensure that JP2 and JP4 are always connected. For 40 pin targets also connect JP3. UM005100-IRR0400 2-11 Emulator Operation Set-Up and Installation DIP SETTINGS DIP switch banks S1 and S3 are used to disable digital functions for ports 1 and 3. DIP switch banks S2, S4, S5 and S6 are used to emulate port pin pull-up transistors for the Ice Chip. See Figure 2-3 for the location of the DIP switches. The following tables list DIP settings that are easily configured by the user. TABLE 2-2. DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS DIP bank S1 S1 S1 S1 S1 S1 S1 S1 Switch Description 1 2 3 4 5 6 7 8 Turn off to disable digital functions for Port 5 Pin 0 Turn off to disable digital functions for Port 5 Pin 1 Turn off to disable digital functions for Port 5 Pin 2 Turn off to disable digital functions for Port 5 Pin 3 Turn off to disable digital functions for Port 4 Pin 4 Turn off to disable digital functions for Port 4 Pin 5 Turn off to disable digital functions for Port 4 Pin 6 Turn off to disable digital functions for Port 4 Pin 7 TABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS DIP bank S2 S2 S2 S2 S2 S2 S2 S2 S4 S4 S4 S4 S4 Switch Description 1 2 3 4 5 6 7 8 1 2 3 4 5 Turn on to set a pull-up resistor for Port 2 Pin 0 Turn on to set a pull-up resistor for Port 2 Pin 1 Turn on to set a pull-up resistor for Port 2 Pin 2 Turn on to set a pull-up resistor for Port 2 Pin 3 Turn on to set a pull-up resistor for Port 2 Pin 4 Turn on to set a pull-up resistor for Port 2 Pin 5 Turn on to set a pull-up resistor for Port 2 Pin 6 Turn on to set a pull-up resistor for Port 2 Pin 7 Turn on to set a pull-up resistor for Port 5 Pin 0 Turn on to set a pull-up resistor for Port 5 Pin 1 Turn on to set a pull-up resistor for Port 5 Pin 2 Turn on to set a pull-up resistor for Port 5 Pin 3 Turn on to set a pull-up resistor for Port 5 Pin 4 2-12 UM005100-IRR0400 Set-Up and Installation Emulator Operation TABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS (CONTINUED) DIP bank S4 S4 S4 S5 S5 S5 S5 S5 S5 S5 S5 S6 S6 S6 S6 S6 S6 S6 S6 Switch Description 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 Turn on to set a pull-up resistor for Port 5 Pin 5 Turn on to set a pull-up resistor for Port 5 Pin 6 Turn on to set a pull-up resistor for Port 5 Pin 7 Turn on to set a pull-up resistor for Port 6 Pin 0 Turn on to set a pull-up resistor for Port 6 Pin 1 Turn on to set a pull-up resistor for Port 6 Pin 2 Turn on to set a pull-up resistor for Port 6 Pin 3 Turn on to set a pull-up resistor for Port 6 Pin 4 Turn on to set a pull-up resistor for Port 6 Pin 5 Turn on to set a pull-up resistor for Port 6 Pin 6 Turn on to set a pull-up resistor for Port 6 Pin 7 Turn on to set a pull-up resistor for Port 4 Pin 0 Turn on to set a pull-up resistor for Port 4 Pin 1 Turn on to set a pull-up resistor for Port 4 Pin 2 Turn on to set a pull-up resistor for Port 4 Pin 3 Turn on to set a pull-up resistor for Port 4 Pin 4 Turn on to set a pull-up resistor for Port 4 Pin 5 Turn on to set a pull-up resistor for Port 4 Pin 6 Turn on to set a pull-up resistor for Port 4 Pin 7 NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower voltage may cause an increase in resistance. UM005100-IRR0400 2-13 PERFORMING OTP PROGRAMMING The Z86L9900100ZEM ICEBOX is designed for OTP programming. To perform OTP programming perform the following steps: 1. Locate the supplied OTP adapter for the micro controller you wish to program. Consult Table 1-1for the proper OTP adapter. 2. Insert the OTP adapter into the emulator's OTP Programming socket (J1 and J2), see Figure 2-3. 3. Place the micro controller into the OTP programing adapter. 4. If the adapter is equipped with a ziff socket, ensure that the ZIF socket locking lever is in the down (closed) position. 5. Perform OTP programing. Consult the ZDS user manual for more information on OTP programing. 6. Pull straight up on the micro controller to remove it from the OTP programing adapter. NOTE: Be careful not to bend the micro controller's pins when removing it from the OTP adapter. Z86L99 ICEBOX USER'S MANUAL CHAPTER 3 OVERVIEW EMULATION The Z86L9900100ZEM ICEBOX uses the Z86D99 ICE chip to provide emulation for the Z8 family of IR controllers. The emulator is capable of OTP programming for the family being emulated. The user can manually set pull-up resistors and adjust the voltage of the ICE chip to match the target's voltage. UM005100-IRR0400 3-1 Using ZDS Overview USING ZDS This emulator is fully compatible with ZiLOG Developer Studio (ZDS) software. The following steps briefly describe the procedures necessary to setup and create projects with the Z86L9900100ZEM emulator. A summary of the emulator's available debug windows is also included at the end of this chapter. For more detailed information on using ZDS, refer to the ZDS User Manual (in PDF format) located on the installation CD-ROM, or download the latest information from our web site at www.zilog.com. SELECT THE EMULATOR To select the emulator and create a new project, perform the following steps: 1. Open ZDS by selecting Start>Programs>Zilog Developer Studio> ZDS. 2. Choose New Project from the File menu. The New Project dialog box appears. NOTE: If the project has already been created, select Target from the Project menu and perform the following steps for the ZiLOG MCU Database dialog box. See Figure 3-1. FIGURE 3-1. NEW PROJECT DIALOG BOX 3. Select Application in the Selection by field. 4. Select IR Remote from the Master pop-up list. 5. Select a microcontroller from the IR Remote family in the Project Target pop-up list. 6. Select Z86L9900100ZEM in the Emulator pop-up list. 3-2 UM005100-IRR0400 Overview Using ZDS 7. Click on the browse button (...) in the Project Name field. The New Project Browse dialog box appears. 8. Enter the project file name and select a path in the New Project Browse dialog box. NOTE: All build output files, such as linker and assembly files are saved in the same directory as the project. 9. Click Save. The project name appears in the Project Name field in the New Project dialog box. 10. Click on Chip Data to view the micro controller specifications. NOTE: Fields in the Chip Data page are read-only and can't be modified. 11. Click OK. The new project is saved as the name specified in the New Project Browse dialog box. 12. Select Emulator Configuration from the Project menu. The Emulator Configuration dialog box appears. See Figure 3-2. FIGURE 3-2. EMULATOR CONFIGURATION DIALOG BOX 13. Ensure that Emulator is selected in the Module field. 14. Select the port the emulator is connected to from the Port pop-up list. 15. Select 57600 from the Baud Rate pop-up list. 16. Click OK to close and apply the Emulator Configuration options. 17. Select Save Project from the File menu to save the emulator configuration setting. UM005100-IRR0400 3-3 Using ZDS Overview OPEN A PROJECT AND ADD FILES A previously created project has the following attributes saved with it: * * * Target settings Assembler and Linker settings for the specified target Source files (including header files) NOTE: Use the Project Viewer window to view and access the various files in any given project. Perform the following steps to open a previously created project: 1. Select Open Project from the File menu. The Open Project dialog box appears. 2. In the Open Project dialog box, select the previously created project. The project appears in the Project Viewer window. See Figure 3-3. FIGURE 3-3. PROJECT VIEWER WINDOW Add an existing file Perform the following steps to add an existing file to a project: 1. Select Add to Project>Files from the Project menu. The Insert Files into Project dialog box appears. See Figure 3-4. 3-4 UM005100-IRR0400 Overview Using ZDS FIGURE 3-4. INSERT FILES INTO PROJECT DIALOG BOX 2. Select the file to add to the project. 3. Click Open. The file appears in the Project Viewer window. See Figure 3-5. FIGURE 3-5. PROJECT VIEWER WINDOW WITH FILE 4. Double-click on the file in the Project Viewer window. The file appears in the ZDS main Edit window. NOTE: In some cases, non-editable files, such as .obj files need to be included in a project. These files will be displayed in the source file list, but cannot be opened. When the project is built, these files are automatically linked. 5. Select Update All Dependencies from the Build menu. The Dependencies folder list in the Project Viewer window is updated. UM005100-IRR0400 3-5 Using ZDS Add a new file Overview 1. Select Add to Project>New from the Project menu. The Insert New Files Into Project dialog box appears. 2. Type a file name in the File Name field. 3. Click Open. The new file name appears in the Project Viewer window with a .asm suffix, and a blank Edit window also appears. NOTE: Header and Included files do not have to be added. The program detects those called by the source code. 3-6 UM005100-IRR0400 Overview Available Debug Windows AVAILABLE DEBUG WINDOWS The following table lists the debug windows that are available using ZDS. TABLE 3-1. DEBUG WINDOWS Window Function (Updated values will display in red) Watch Z8 Standard Registers Code Memory * * * * * * * * * * Shows the symbols and the contents of the registers (see the ZDS user manual for more information) Shows the contents of the Z8 standard registers Allows the user to monitor, edit, and download a file.ld or file.hex into the Code Memory from generated assembly source code Tracks a specific address entered in the Code Address edit box Shows code memory disassembled code along with the corresponding Disassembly Allows the user to edit, and download a file.ld or file.hex into the Code memory Follows the program counter Provides a complete scroll down with this window, however the scroll up is limited Accesses the disassembly of code at the address specified in the Code Address field The Disassembly window is automatically displayed when debugging hex code or whenever there is no corresponding source file available at the address specified by the program counter Shows all Z8 internal and external registers, all RAM pointer and data registers, status registers and status flags, and stacks Monitor and edit write-able registers in this window Displays the Z8 Expanded Register banks that are specified in the configuration Monitor and edit write-able registers directly in this window by selecting a specific bank tab Modify and view working registers in this window Z8 Register File * * * * Z8 Expanded Register Working Registers * UM005100-IRR0400 3-7 Available Debug Windows TABLE 3-1. DEBUG WINDOWS (CONTINUED) Window Function (Updated values will display in red) Overview Timer Counter Registers Ports Register Internal Data Memory * * * Modify the timer/counter registers in this window Monitor and edit port registers in this window Display address from FF00 to FFFF 3-8 UM005100-IRR0400 Z86L99 ICEBOX USER'S MANUAL APPENDIX A TROUBLESHOOTING GUIDE INTRODUCTION Before contacting a ZiLOG representative or submitting a Problem Report, please follow these simple steps. Also, check the Precautions and Limitations sections in the Product Information document included with the emulator to eliminate other possible known problems. If a hardware failure is suspected, contact a local ZiLOG representative for assistance. If the initial ZiLOG screen is not appearing after selecting the COM port and the screen message displays Time-out while reading: 1. Check the RS-232C cable connection and communication port selection in ZDS. See Select the Emulator on page 3-2 for more information on how to configure the host PC's port. 2. Reset the emulator and ZDS. 3. If you are using the emulator's oscillator, ensure that you removed the target's oscillator and connected pin 2 to pin 3 on the J5 jumper. 4. If ICEBOX stops working after connecting to the target, check whether the target crystal is removed while using the ICEBOX's oscillator. 5. Try connecting another cable. 6. Check if transmit/receive signals need to be swapped. NOTE: On some DB9 connectors for the COM ports, the transmit/receive signal may be swapped and a Null Modem adapter may be required. 7. Ensure that the power supply is connected, is turned on, and power is available. 8. Ensure that the power supply is set at +4.75 VDC to +5.25 VDC Max (+5.0 VDC typical). 9. Ensure that the J6 power jumper has been properly configured. See Emulator connection on page 2-2 for more information on setting the J6 jumper. 10. Check if power supply is supplying the required current (0.8A typical) to the emulator. UM005100-IRR0400 A-1 Counter Jumps to Unexpected Address Troubleshooting Guide 11. Check P42 pin. If P42 stays low check the target pod and ensure that it is not shorting to ground. If it is shorted, ensure that you are using the proper emulation pod, see Table 1-1. 12. After resetting the emulator, wait a minimum of 5 seconds before running ZDS. 13. If P42 always shows low, check the 40-pin target pod's pin 31. NOTE: The previous Z86L71 and Z86L98 ICEBOX 40 pin target pod have pin 31 connecting to ground for emulating the L73/87/89. That target pod can not be used for Z86L990 emulation. Only use the target cable which is shipped with the Z86L99 ICEBOX. COUNTER JUMPS TO UNEXPECTED ADDRESS Any instruction other than a DI instruction is used to disable interrupts. Possible causes include: * * * The stack overflows into the general register locations. Extra POP, PUSH, IRET, or RET is encountered (stack unbalanced). Program resets repeatedly. - Program counter rolls over from value FFFF to 0000 and proceeds back to the beginning of program. - Watch-Dog Timer (WDT) is not initialized or refreshed. Unintialized interrupt vector is activated. The interrupt vector is not set to the interrupt handler. * A-2 UM005100-IRR0400 Troubleshooting Guide ZDS Error Messages ZDS ERROR MESSAGES CAN NOT OPEN WINDOWS If this message appears while attempting to open a window in ZDS, there may be too many applications running. Try closing the other active applications or exit and restart your PC. OUT OF SYNCHRONIZATION WITH THE EMULATOR This message appears whenever communication between the emulator and the PC is interrupted. 1. Ensure that the power cable is connected. 2. Ensure that the RS-232C cable is connected. 3. Change the baud rate setting (default is 19200). A lower setting usually improves communications reliability. 4. Reestablish communication between ZDS and the emulator. See the ZDS user manual for more information establishing communication with an emulator. UM005100-IRR0400 A-3 Z86L99 ICEBOXUSER'S MANUAL APPENDIX B PROBLEM/SUGGESTION REPORT FORM If you experience any problems while operating this product, or if you note any inaccuracies while reading the User's Manual, please copy this form, fill it out, then mail or fax it to ZiLOG. We also welcome your suggestions! Customer Information Name Company Address City/State/ZIP Product Information and Return Information Serial # or Board Fab #/Rev. # Software Version Manual Number Host Computer Description/Type Country Telephone Fax Number E-Mail Address ZiLOG, Inc. System Test/Customer Support 910 E. Hamilton Ave., Suite 110, MS 4-3 Campbell, CA 95008 Fax Number: (408) 558-8536 Email: tools@zilog.com Problem Description or Suggestion Provide a complete description of the problem or your suggestion. If you are reporting a specific problem, include all steps leading up to the occurrence of the problem. Attach additional pages as necessary. ______________________________________________________________________________________ ______________________________________________________________________________________ ______________________________________________________________________________________ UM005100-IRR0400 B-1 Z86L99 ICEBOX USER'S MANUAL GLOSSARY Address Space Physical or logical area of the target systemOs Memory Map. The memory map could be physically partitioned into ROM to store code, and RAM for data. The memory can also be divided logically to form separate areas for code and data storage. American National Standards Institute. American Standard Code of Information Interchange. Assembler File. Asynchronous Communication Protocol. Asynchronous Transfer Mode. Binary. Unit of measure of transmission capacity. Number system based on 2. A binary digit is a bit. Bidirectional Synchronous Communication Protocol. ANSI ASCII ASM ASYNC ATM B Baud Binary BISYNC Bisynchronous Communications A protocol for communications data transfer used extensive in mainframe computer networks. The UM005100-IRR0400 Glossary-1 Glossary sending and receiving computers synchronize their clocks before data transfer may begin. Bit A digit of a binary system. It has only two possible values: 0 or 1. Bits Per Second. Number of binary digits transmitted every second during a data-transfer procedure. Storage Area in Memory. A defect or unexpected characteristic or event. In Electronics, a parallel interconnection of the internal units of a system that enables data transfer and control Information. A collection of four sequential bits of memory. Two sequential bytes (8 bits) comprise one word. This command invokes a subroutine A field of one or more bytes appended to a block of n words which contains a truncated binary sum formed from the contents of that block. The sum is used to verify the integrity of data in a ROM or on a tape. Device name used to designate a communication port. BPS Buffer Bug Bus Byte CALL Checksum COM Glossary-2 UM005100-IRR0400 Glossary Control Section A continuous logical area containing code or user data. Each control section has a name. The linker puts all those control sections with the same name in one entity. The linker provides address spaces to the control sections. There are either absolute control sections or relocatable ones. Central Processing Unit. A linkage editor that executes on a processor that is not the same as the target processor. Digital Signal Processing. A specialized microprocessor that is tailored to perform high repetition math processing and improve signal quality. An emulation device. For example, an In-Circuit Emulator (ICE) module duplicates the behavior of the chip it emulates in the circuit being tested. A symbol that is referenced in the current program file but is defined in another program file. Graphical User Interface. The windows and text that a user sees on their computer screen when they are using a program. Hexadecimal, Half-Carry Flag. Hexadecimal. A Base-16 Number System. Hex values are often substituted for harder to read binary numbers. In-Circuit Emulator. A ZiLOG product which supports the application design process. Interrupt Enable. Glossary-3 CPU Cross-Linkage Editor DSP Emulator External Symbol GUI H Hex Hexadecimal ICE IE UM005100-IRR0400 Glossary IM IMASK IMR INC INCW Initialize Immediate Data Addressing Mode. Interrupt Mask Register. Interrupt Mask Register. Increment. Increment Word. To establish start-up parameters, typically involving clearing all of some part of the deviceOs memory space. Command. Interrupt. A symbol that is defined in a program file. This symbol could be visible to multiple functions within the same program file. Input/Output. In computers, the part of the system that deals with interfacing to external devices for input or output, such as keyboards or printers. Interrupt Priority Register. Indirect Working-Register Pair Only. Infrared. A light frequency range just below that of visible light. Interrupt Request. Integrated Services Digital Network. International Standards Organization. Instruction INT Internal Symbol I/O IPR Ir IR IRQ ISDN ISO Glossary-4 UM005100-IRR0400 Glossary JP JR Library Jump. Jump Relative. A File Created by a Librarian. This file contains a collection of object modules that were created by an assembler or directly by a C compiler. Symbol visible only to a particular function within a program file. Least Significant Bit. Microcontroller or Microcomputer Unit. Minus. Multiply and Load. Multiply and ADD. Multiply and Subtract. Most Significant Bit. A Group of 4 Bits. Non-Maskable Interrupt. No Operation. Programming code created by assembling a file with an assembler or compiling a file with a compiler. These are relocatable object modules and are input to the linker in order to produce an executable file. Object Module Format. Local Symbol LSB MCU MI MLD MPYA MPYS MSB Nibble NMI NOP Object Module OMF UM005100-IRR0400 Glossary-5 Glossary OPC Op Code OTP PCON PER Operation Code. Operation Code. One-Time Programmable. Port configuration register. Peripheral. A device which supports the import or output of information. Retrieve a Value from the Stack. Power-On Reset. The point at which a communications circuit terminates at a Network, Serial, or Parallel Interface card. Prescaler. Programmable Read-Only Memory. Formal set of communications procedures governing the format and control between two communications devices. A protocol determines the type of error checking to be used, the data compression method, if any, how the sending device will indicate that it has finished sending a message, and how the receiving device will indicate that it has received a message. Programmable Reload Timer or Print. Pointer. Post, Telephone, and Telegraph. Agency in many countries that is responsible for providing telecommunication approvals. POP POR Port PRE PROM Protocol PRT PTR PTT Glossary-6 UM005100-IRR0400 Glossary Public/Global Symbol A programming variable that is available to more than one program file. Store a Value In the Stack. Working Register Address. Register or Working-Register Address, Rising Edge. Relative Address. Random-Access Memory. A memory that can be written to or read at random. The device is usually volatile, which means the data is lost without power. Resistance/Capacitance. Read. Reset. In a digital image, the total number of pixels in the horizontal and vertical directions. Refresh. Read-Only Memory. Nonvolatile memory that stores permanent programs. ROM usually consists of solid-state chips. ROM Chip Select. Register Pointer. Read Register or Rotate Right. Set C Flag. PUSH r R RA RAM RC RD RES Resolution RFSH ROM ROMCS RP RR SCF UM005100-IRR0400 Glossary-7 Glossary SIO SL SLL SMR SN SOIC SP SPH SPI SPL SRAM SR SRA SRC SSI Serial Input/Output. Shift Left or Special Lot. Shift Left Logical. Stop Mode Recovery. Serial Number. Small Outline IC. Stack Pointer. Stack Pointer High. Serial Peripheral Interface. Stack Pointer Low. Static Random Access Memory. Shift Right. Shift Right Arithmetic. Source. Small Scale Integration. Chip that contains 5 to 50 gates or transistors. Characteristic of Random Access Memory that enables It to operate without clocking signals. Status. Stack Pointer. Static ST STKPTR Glossary-8 UM005100-IRR0400 Glossary SUB SVGA S/W SWI Symbol Definition Subtract. Super Video Graphics Adapter. Software. Software Interrupt. Symbol defined when the symbol name is associated with a certain amount of memory space, depending on the type of the symbol and the size of Its dimension. Symbol referenced within a program flow, whenever It is accessed for a read, write, or execute operation. Synchronous Communication Protocol. An event or device is synchronized with the CPU or other process timing. Time Constant. Trellis Coded Modulation. Timer Control Register. Timer Mode Register. Universal Asynchronous Receiver Transmitter. Component or functional block that handles asynchronous communications. Converts the data from the parallel format in which it is stored, to the serial format for transmission. Unsigned Greater Than or Equal. Unsigned Greater Than. Glossary-9 Symbol Reference SYNC TC TCM TCR TMR UART UGE UGT UM005100-IRR0400 Glossary ULE ULT UM USART Unsigned Less Than or Equal. Unsigned Less Than. UserOs Manual. Universal Synchronous/Asynchronous Receiver/Transmitter. Can handle synchronous as well as asynchronous transmissions. Universal Serial Bus. Universal Serial Controller. Use Test Box. A board or system to test a particular chip in an end-use application. Volt, Overflow Flag. Supply Voltage. Voltage from the Digital Power Supply. Programmed Voltage. Video Random-Access Memory. A special form of RAM chip that has a separate serial-output port for display refresh operations. This architecture speeds up video adaptor performance. Analog Reference Voltage. Watch-Dog Timer. A timer that, when enabled under normal operating conditions, must be reset within the time period set within the application (WDTMR (1,0)). If the timer is not reset, a Power-on Reset occurs. Some earlier manuals refer to this timer as the WDTMR. USB USC UTB V VCC VDD VPP VRAM VREF WDT Glossary-10 UM005100-IRR0400 Glossary WDTOUT Word Watch-Dog Timer Output. Amount of data a processor can hold in its registers and process at one time. A DSP word is often 16 bits. Given the same clock rate, a 16-bit controller processes four bytes in the same time it takes an 8-bit controller to process two. Write. Wafer Sort. Indexed Address, Undefined. Bitwise Exclusive OR. Crystal. Zero, Zero Flag. ZiLOG Assembler. ZiLOGOs program development environment for DOS. ZiLOG Developer Studio. ZiLOGOs program development environment for Windows 95/98/NT. ZiLOG Emulator. Three fields per symbol including a string containing the Symbol Name, a Symbol Attribute, and an Absolute Value in Hexadecimal. ZiLOG Linkage Editor. Cross linkage editor for ZiLOGOs microcontrollers. ZiLOG Librarian. Librarian for creating library files from locatable object modules for the ZiLOG family of microcontrollers. Glossary-11 WR WS X XOR XTAL Z ZASM ZDS ZEM ZiLOG Symbol Format ZLD ZLIB UM005100-IRR0400 Glossary ZMASM ZDS ZiLOG Macro Cross Assembler. ZiLOGOs program development environment for Windows 3.1 and up. ZiLOGOs Object Module Format. The object module format used by the linkage editor. ZOMF Glossary-12 UM005100-IRR0400 Z86L99 ICEBOX USER'S MANUAL INDEX A-D Adjust the voltage. . . . . . . . . . . . . . Adjusting power . . . . . . . . . . . . . . . Available Debug Windows . . . . . . . Chip Data. . . . . . . . . . . . . . . . . . . . Choosing the IceChip . . . . . . . . . . . Clocks . . . . . . . . . . . . . . . . . . . . . . Connect to Your Design . . . . . . . . . Quick installation . . . . . . . . . . . . . .2-1 Requirements . . . . . . . . . . . . . . . . .1-5 RESET . . . . . . . . . . . . . . . . . . . . . .2-8 Resetting. . . . . . . . . . . . . . . . . . . . .2-8 Selecting the emulator . . . . . . . . . . .3-2 serial cable . . . . . . . . . . . . . . . . . . .2-5 Software Installation . . . . . . . . . . . .2-8 Software Setup . . . . . . . . . . . . . . . .3-2 Supported ZiLOG Devices . . . . . . . .1-3 Target connectors . . . . . . . . . . . . . .2-4 Troubleshooting . . . . . . . . . . . . . . A-1 2-7 2-7 3-7 3-3 2-8 1-3 2-6 E-I Error Messages. . . . . . . . . . . . . . . .A-3 Header and Included files . . . . . . . . 3-6 Insert Files . . . . . . . . . . . . . . . . . . . 3-4 installation instructions . . . . . . . . . . 2-2 U-Z voltage adjuster . . . . . . . . . . . . . . . .2-7 ZDS adding files . . . . . . . . . . . . . . . . .3-4 Create a New Project . . . . . . . . . .3-2 Debug windows. . . . . . . . . . . . . .3-7 New Project . . . . . . . . . . . . . . . .3-3 obj files. . . . . . . . . . . . . . . . . . . .3-5 Open a project . . . . . . . . . . . . . . .3-4 Project Viewer window . . . . . . . .3-6 J-N jumper settings . . . . . . . . . . . . . . . . Kit Contents . . . . . . . . . . . . . . . . . . LED Operation . . . . . . . . . . . . . . . . Limitations. . . . . . . . . . . . . . . . . . . logic analyzer . . . . . . . . . . . . . . . . . 2-8 1-4 2-9 1-2 2-7 O-T OTP programming . . . . . . . . . . . . 2-14 power supply . . . . . . . . . . . . . . . . . 2-5 adjusting . . . . . . . . . . . . . . . . . . 2-5 problems . . . . . . . . . . . . . . . . . . 2-8 settings . . . . . . . . . . . . . . . . . . . 2-1 powering down. . . . . . . . . . . . . . . . 2-8 UM005100-IRR0400 Index-1 A B C D E 4 (U13) (U13) (U13) (U13) (U13) (U13) (U13) (U13) (U8) (U8) (U8) (U8) (U10) (U10) (U12) (U12) (U9) (U9) VCC 4 C8 0.1UF C9 0.1UF C10 0.1UF C11 0.1UF C12 0.1UF C13 0.1UF C14 0.1UF C15 0.1UF C16 0.1UF C17 0.1UF C18 0.1UF C19 0.1UF C20 0.1UF C21 0.1UF C22 0.1UF C23 0.1UF C24 0.1UF C25 0.1UF (U9) (U9) (U11) (U11) (U11) (U11) (U15) (U15) (U16) (U16) (U14) (U14) (Y1) (U1) (U1) (U2) (U2) (U3) VCC C26 0.1UF C27 0.1UF C28 0.1UF C29 0.1UF C30 0.1UF C31 0.1UF C32 0.1UF C33 0.1UF C34 0.1UF C35 0.1UF C36 0.1UF C37 0.1UF C38 0.1UF C39 0.1UF C40 0.1UF C41 0.1UF C42 0.1UF C43 0.1UF 3 3 (U3) (U3) (U3) (U6) (U7) (U5) VCC C44 0.1UF C45 0.1UF C46 0.1UF C47 0.1UF C48 0.1UF C49 0.1UF C78 0.1UF + C72 100UF (U10) (U10) (U12) (U12) (U15) (U15) (U16) (U16) (U14) (U14) (U17) (U17) (U17) (U17) (U17) (U18) (U18) (U1) VCC_I C50 0.1UF 2 C51 0.1UF C52 0.1UF C53 0.1UF C54 0.1UF C55 0.1UF C56 0.1UF C57 0.1UF C58 0.1UF C59 0.1UF C60 0.1UF C61 0.1UF C62 0.1UF C63 0.1UF C64 0.1UF C65 0.1UF C66 0.1UF C67 0.1UF 2 (U1) (U2) (U2) VCC_I VCC 1 2 3 4 5 CON5 GND 1 2 3 4 5 CON5 C68 0.1UF C69 0.1UF C70 0.1UF + C71 100UF + C77 100UF 1 1 BYPASS/DECOUPLING CAPACITORS Title SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: A B C D Document Number Monday, August 14, 2000 Sheet E Rev A 1 of 11 UM005100-IRR0400 Schematic 1 A B C D E LG P4[0..7] P5[0..7] P2[0..7] P4[0..7] P5[0..7] P2[0..7] P_CT_CLK P_TBD3 P_TBD2 P_TBD1 P_CLK P_CLR nP_PGM P_WR_RD P_CLK_CE R32_64 nEXR_OFF nIRQ_ACK nMAS_I SCLK nMDS_I nSYNC nRST_frI FG_BG AD_M[7..0] A_I[15..8] AD_I[7..0] nDS_I POWER A_M_LO[1..0] nWR_DAC AD_M[7..0] nIRQ_ACK P_RD_WR P_CLK_CE P_WR_RD nP_PGM P_CLR P_CLK P_TBD1 P_TBD2 P_TBD3 4 4 PGM_LOGIC P_RD_WR P_CLK_CE P_WR_RD nP_PGM P_CLR P_CLK P_TBD1 P_TBD2 P_TBD3 D_P[7..0] P_AL_CLK P_AH_CLK nRST_frI FG_BG POWER LOGIC AD_I[7..0] A_M_LO[1..0] AD_M[7..0] PROGRAMMING LOGIC nWR_DAC 3 3 P4_I[0..7] P5_I[0..7] P6_I[0..7] P2_I[0..7] P4_I[0..7] P5_I[0..7] P6_I[0..7] P2_I[0..7] R_W_I nAS_I LOGIC ANALYZER CONNECTOR TRANS FG_BG nAS_I nIRQ_ACK FG_BG A_M_LO[1..0] P_RD_WR ICE nAS_Itv nDS_Itv P34tv A_Itv[15..8] AD_Itv[7..0] R_W_Itv nSYNCtv nMDS_Itv SCLKtv nMAS_Itv nDTMRtv XTAL1tv nXROFFtv nIACKtv nRST_Itv nRST_Ttv nAS_Itv nDS_Itv P34tv A_Itv[15..8] AD_Itv[7..0] R_W_Itv nSYNCtv nMDS_Itv SCLKtv nMAS_Itv nDTMRtv XTAL1tv nXROFFtv nRST_Itv nRST_Ttv nAS_Itv nDS_Itv P34tv A_Itv[15..8] AD_Itv[7..0] R_W_Itv nSYNCtv nMDS_Itv SCLKtv nMAS_Itv nDTMRtv XTAL1tv nXROFFtv nRST_Itv nRST_Ttv P_CLK_CE P_WR_RD nP_PGM P_CLR P_CLK P_TBD1 P_TBD2 P_TBD3 CTRL nIRQ_ACK FG_BG nWR_DAC P_WR_RD P_CLK_CE P_AH_CLK P_AL_CLK D_P[7..0] P2_I[0..7] P6_I[0..7] P5_I[0..7] P4_I[0..7] P34_nDM A_I[15..8] nDS_I AD_I[7..0] R_W_I nSYNC nMDS_I SCLK nMAS_I nEXR_OFF R32_64 nRST_frI nRST_T nDR_P1MM nAD_I_OE I_WR_RD P34_nDM A_I[15..8] nDS_I nAS_I R_W_I nSYNC nMDS_I SCLK nMAS_I nEXR_OFF R32_64 nRST_T nDR_P1MM nAD_I_OE I_WR_RD P34_nDM A_I[15..8] nDS_I nAS_I R_W_I nSYNC nMDS_I SCLK nMAS_I nEXR_OFF R32_64 nRST_frI nRST_T nDR_P1MM nAD_I_OE I_WR_RD CONTROL LOGIC nRST_Itv P_CT_CLK AD_M[7..0] C_JAM_P1 A_M[15..8] nDS_frI nDS_M nAS_M R_W_M C_DR_ADI nDM nRST_frM nRST_CT P_CT_CLK AD_M[7..0] C_JAM_P1 A_M[15..8] nDS_frI nDS_M nAS_M R_W_M C_DR_ADI nRST_frM nRST_CT P_CT_CLK AD_M[7..0] C_JAM_P1 A_M[15..8] nDS_frI nDS_M nAS_M R_W_M C_DR_ADI nDM nRST_frM nRST_CT R_W_I P2[0..7] P5[0..7] P4[0..7] 2 2 ICE MCU nIACKtv nIACKtv VOLTAGE TRANSLATOR nRST_Itv nMAS_I SCLK nSYNC A_I[15..8] AD_I[7..0] MOTHERBOARD INTERFACE 1 FOR USER"S MANUAL ONLY Title ZILOG 4201 Bee Caves Road Suite C-100 Austin, TX 78746 D_P[7..0] CPLD P_AH_CLK P_AL_CLK 1 SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD Size B Date: A B C D Document Number Monday, August 14, 2000 Sheet E Rev A 2 of 11 UM005100-IRR0400 Schematic 2 A B C D E VCC 4 2 2 USER NOTE: INSTALL JUMPER IF TA RGET SYSTEM USES POR T 3 PIN 4 AS /DM PIN TO ACCE SS EXTERNAL DATA/PROG RAM MEMORY. J3 1 J4 2 DM_ENA 1 R17 10K EXT_M EM 1 2 R18 10K 1 VCC USER NOTE: INSTALL JUMPER IF TARGET SYSTEM U SES PORT 1 AS AD DRESS/DATA BUS. 4 A_M[15..8] A_M[15..8] pg8 P_CT_CLK pg8 nRST_CT pg8 nDS_M pg8 DM_ENA EXT_MEM P_CT_CLK nRST_CT nDS_M 1 R19 10K 2 nRST_frM C_DR_ADI nAS_M nRST_frM pg8 C_DR_ADI pg8 nAS_M pg8 3 78 7 82 11 10 9 8 6 5 4 81 80 79 2 1 83 84 GBL_OE P_CT_CLK nRST_CT nDS_M nRST_frM C_DR_ADI nAS_M DM_ENA EXT_MEM GND7 GND82 VCC3 VCC78 A_M15 A_M14 A_M13 A_M12 A_M11 A_M10 A_M9 A_M8 77 76 75 U13 A_M15 A_M14 A_M13 A_M12 A_M11 A_M10 A_M9 A_M8 VCC 3 13 26 19 32 pg11 pg11 pg11 pg11 pg11 pg11 pg8 pg11 pg11 pg11 pg7 pg7 pg8 pg8 pg11 nRST_T nMDS_I nDS_I R_W_I nMAS_I P34_nDM nDM nSYNC SCLK nAS_I R32_64 nEXR_OFF C_JAM_P1 FG_BG nDR_P1MM nRST_frI nRST_T nMDS_I nDS_I R_W_I nMAS_I P34_nDM nDM nSYNC SCLK nAS_I R32_64 nEXR_OFF C_JAM_P1 FG_BG nDR_P1MM nRST_frI nRST_toM 12 15 16 17 18 20 21 22 24 25 27 28 29 30 31 14 23 VCC13 VCC26 GND19 GND32 nRST_T nMDS_I nDS_I R/W_I nMAS_I P34_nDM nDM nSYNC SCLK nAS_I R32/63 nEXR_OFF C_JAM_P1 FG_BG nDR_P1MM nRST_frI (TDI) nRST_toM (TMS) I_WR/RD nAD_I_OE nRST_Itv A_M_LO0 A_M_LO1 P_RD/WR P_TBD3 P_TBD2 P_TBD1 GND42 GND47 VCC38 VCC43 VCC53 R/W_M AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 P_CLKE/CE P_WR/RD nDS_frI nP_PGM P_CLR P_CLK (TDO) I/O1 (TCK) I/O2 GND59 GND72 VCC66 74 73 70 69 68 67 65 64 63 61 60 58 57 56 55 71 62 59 72 66 R_W_M AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 P_CLK_CE P_WR_RD nDS_frI nP_PGM P_CLR P_CLK (TDO) (TCK) VCC AD_M[7..0] R_W_M pg8 AD_M[7..0] pg8 3 P_CLK_CE pg7,8,10 P_WR_RD pg7,8,10 nDS_frI pg8 nP_PGM pg7,10 P_CLR pg7,10 P_CLK pg7,10 2 1 1 VCC R21 10K 2 2 R20 10K 2 A_I8 A_I9 A_I10 A_I11 A_I12 A_I13 A_I14 A_I15 ISP HEA DER FOR ALTERA CPLD P4 1 3 5 7 9 2 4 6 8 10 VCC 33 34 35 36 37 39 40 41 44 45 46 48 49 50 51 52 54 42 47 38 43 53 EPM7128S-LC84 A_M_LO0 A_M_LO1 P_RD_WR A_I8 A_I9 A_I10 A_I11 A_I12 A_I13 A_I14 A_I15 I_WR_RD nAD_I_OE nRST_Itv (TCK) (TDO) (TMS) (TDI) 1 pg11 A_I[15..8] A_I[15..8] pg11 I_WR_RD pg11 nAD_I_OE pg4,11 nRST_Itv pg9 A_M_LO[1..0] pg10 P_RD_WR pg7,10 pg7,10 pg7,10 P_TBD3 P_TBD2 P_TBD1 A_M_LO[1..0] 2 P_TBD3 P_TBD2 P_TBD1 R22 10K DESIGNER NOTE: ALTERA PIN USE FOR ISP CAN ALSO BE USED AS I/O CONTROL PIN. P IN NOT CURENTLY USED A S I/O PIN CAN BE USED AS I/O PIN IN THE FUTURE AS NEEDED. 1 1 (TMS) (TDI) CONTROL LOGIC Title FOR USER"S MANUAL ONLY SCHEMATIC, Z86L EMULATION DAUGHTER BOARD 99 Size B Date: Document Number Monday, August 14, 2000 Sheet E Rev A 3 of 11 A B C D UM005100-IRR0400 Schematic 3 A B C D E VCC_I 1 VCC_I 1 R46 R45 10K 4 Test Port 4 A_Itv[15..8] AD_Itv[7..0] AD_Itv0 AD_Itv1 AD_Itv2 AD_Itv3 AD_Itv4 AD_Itv5 AD_Itv6 AD_Itv7 A_Itv[15..8] pg11 AD_Itv[7..0] pg11 2 10K 2 P7 2 4 6 8 10 12 14 16 1 3 5 7 9 11 13 15 L99 IC E MCU U17 AD_Itv0 AD_Itv1 AD_Itv2 AD_Itv3 AD_Itv4 AD_Itv5 AD_Itv6 AD_Itv7 A_Itv8 A_Itv9 A_Itv10 A_Itv11 A_Itv12 A_Itv13 A_Itv14 A_Itv15 L99Vref+ nMAS_Itv L99VrefnMDS_Itv nIACKtv nSYNCtv SCLKtv nDTMRtv nICEtv AGND nXROFFtv 4 6 3 9 10 18 19 21 27 28 31 34 59 60 61 62 23 63 15 64 71 65 77 66 73 14 69 58 24 11 25 75 26 33 2 13 41 42 70 76 32 R27 10K C80 .01UF 2 1 48 MAD0 MAD1 MAD2 MAD3 MAD4 MAD5 MAD6 MAD7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 MA15 Vref+ nMAS VrefnMDS nIACK nSYNC SCLK nDTIMER nICE AGND1 AGND2 nICEIBF AVDD VDD1_CORE VDD4_CORE VDD3 VDD5 VDD2 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 DVBON P20 P21 P22 P23 P24 P25 P26 P27 P60 P61 P62 P63 P64 P65 P66 P67 P50 P51 P52 P53 P54 P55 P56 P57a P57b P40 P41 P42 P43 P44 P45 P46 P47 R/nW 74 78 79 80 81 5 7 8 82 83 84 1 44 45 46 47 55 35 38 39 40 49 54 50 52 56 67 68 72 16 17 20 22 57 P2_I0 P2_I1 P2_I2 P2_I3 P2_I4 P2_I5 P2_I6 P2_I7 P6_I0 P6_I1 P6_I2 P6_I3 P6_I4 P6_I5 P6_I6 P6_I7 P5DA_I0 P5DA_I1 P5DA_I2 P5DA_I3 P5DA_I4 P5DA_I5 P5DA_I6 P5DA_I7 P4DA_I0 P4DA_I1 P4DA_I2 P4DA_I3 P4DA_I4 P4DA_I5 P4DA_I6 P4DA_I7 R_W_Itv nRST_Itv XTAL1_I XTAL2 _T P2_I[0..7] (L99 PORT2) P2_I[0..7] pg5,7 P34tv pg11 nRST_Ttv pg11 VCC_I 1 VCC_I 1 R43 10K 2 2 R42 10K VCC_I 1 P6_I[0..7] (L99 PORT6) P6_I[0..7] pg5,7 R44 10K 2 nAS_Itv nDS_Itv P5DA_I[0..7] (L99 PORT5) P5DA_I[0..7] pg5,7 pg11 pg11 3 3 pg11 pg5 pg11 pg5 pg11 pg11 pg11 pg11 pg11 pg5 pg5 nXROFFtv L99Vref+ nMAS_Itv L99VrefnMDS_Itv nIACKtv nSYNCtv SCLKtv nDTMRtv AGND AVDD AVDD JP2 1 2 JP3 1 2 JP4 P4DA_I[0..7] VCC_I 1 (L99 PORT4) P4DA_I[0..7] pg5,7 R26 1M 2 USER NOTE: INSTALL JP2 AND JP3 IF 28 PIN PART INSTALL JP2 IF 40 PIN PART VCC_I 2 2 1 43 nRESET 30 XTAL1 29 XTAL2 NC1 NC2 NC3 NC4 NC5 12 36 37 51 53 nRST_Itv nRST_Itv pg3,11 2 + C79 100uF JP1 CON2 Z86D99AA FOR USER"S MANUAL ONLY pg11 pg5 pg5 pg11 1 R_W_Itv XTAL2_ T XTAL1_ T XTAL1tv R_W_Itv XTAL2 _T XTAL1 _T XTAL1tv XTAL1 _T XTAL1tv J5 1 3 HDR103 1 2 XTAL1_I USER NOTE: SELECT CLOCK SOURCE FOR ICE MCU ON DAUGHTER BOARD. JUMPER PIN 1 & 2 => CLOCK FOR DAUGHTER BOA RD ICE MCU TO COME FROM TARGET SY STEM. JUMPER PIN 2 & 3 => DAUGHTER BOARD I CE MCU WILL USES OSCILLATOR RESIDING ON DAUG HTER BOARD. ICE MCU Title SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: Document Number Tuesday, August 15, 2000 Sheet E Rev A 4 of 11 A B C D UM005100-IRR0400 Schematic 4 A B C D E pg4,7 P5_I[0..7] pg4,7 P6_I[0..7] pg4,7 P4_I[0..7] pg4,7 P2_I[0..7] VCC_I 4 P5_I[0..7] P6_I[0..7] P4_I[0..7] P2_I[0..7] (L99 (L99 (L99 (L99 PORT5) PORT6) PORT4) PORT2) TURN SWITCH TO ON POSIT ION TO ENABL E RESISTOR PULL UP ON PORT PINS. 1 2 3 4 5 6 7 8 9 10 RN1 P2PU_I0 P2PU_I1 P2PU_I2 P2PU_I3 P2PU_I4 P2PU_I5 P2PU_I6 P2PU_I7 S2 1 2 3 4 5 6 7 8 SW DIP-8 16 15 14 13 12 11 10 9 P2_I0 P2_I1 P2_I2 P2_I3 P2_I4 P2_I5 P2_I6 P2_I7 TARGE T CONNECTORS P5 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 P6_I2 P6_I1 P6_I3 P6_I0 P2_I5 P2_I4 P2_I6 P2_I3 P2_I7 P2_I2 AGND P2_I1 L99VrefP2_I0 P4DA_I4 P4DA_J3 P4DA_I5 GND P4DA_I6 P4DA_I2 P4DA_I7 P4DA_I1 L99Vref+ P4DA_I0 AVDD P5DA_I0 VCC_Itar P5DA_I6 XTAL2 _T P5DA_I7 XTAL1 _T P5DA_I5 P5DA_I1 P6_I7 P5DA_I2 P6_I6 P5DA_I3 P6_I5 P5DA_I4 P6_I4 PLACE SWITCH IN OPEN POSITION WHEN USING PORT PIN FOR ANALOG FUN CTION. 4 P5_I4 P5_I5 P5_I6 P5_I7 P4_I0 P4_I1 P4_I2 P4_I3 P4_I4 P4_I5 P4_I6 P4_I7 P4DA_I0 P4DA_I1 P4DA_I2 P4DA_I3 P5_I0 P5_I1 P5_I2 P5_I3 1 2 3 4 5 6 7 8 S1 P5DA_I4 P5DA_I5 P5DA_I6 P5DA_I7 16 15 14 13 12 11 10 9 P5DA_I0 P5DA_I1 P5DA_I2 P5DA_I3 P4DA_I4 P4DA_I5 P4DA_I6 P4DA_I7 AGND L99Vref- pg4 pg4 RES_BUS9_680K VCC_I 1 TURN SWITCH TO ON POSI TION TO ENAB LE RESISTOR PULL UP ON PORT PINS. 2 3 4 5 6 7 8 9 10 RN2 P5PU_I0 P5PU_I1 P5PU_I2 P5PU_I3 P5PU_I4 P5PU_I5 P5PU_I6 P5PU_I7 S4 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SW DIP-8 P5_I0 P5_I1 P5_I2 P5_I3 P5_I4 P5_I5 P5_I6 P5_I7 P5DA_I[0..7] P5DA_I[0..7] pg4,7 SW DIP-8 L99Vref+ pg4 AVDD VCC_Itar XTAL2_ T XTAL1_ T pg4 pg4 pg4 P4DA_I[0..7] P4DA_I[0..7] pg4,7 3 3 RES_BUS9_680K VCC_I 1 TURN SWITCH TO ON POSI TION TO ENAB LE RESISTOR PULL UP ON PORT PINS. 2 3 4 5 6 7 8 9 10 RN3 P6PU_I0 P6PU_I1 P6PU_I2 P6PU_I3 P6PU_I4 P6PU_I5 P6PU_I6 P6PU_I7 S5 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SW DIP-8 P6_I0 P6_I1 P6_I2 P6_I3 P6_I4 P6_I5 P6_I6 P6_I7 J8 1 2 P6 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 P2_I5 P2_I4 P2_I6 P2_I3 P2_I7 P2_I2 P4DA_I4 P2_I1 P4DA_I5 P2_I0 P4DA_I6 P4DA_J3 P4DA_I7 GND VCC_Itar P3DA_I2 XTAL2_ T P3DA_I1 XTAL1_ T P4DA_I0 P5DA_I1 P5DA_I0 P5DA_I2 P5DA_I6 P5DA_I3 P5DA_I7 P5DA_I4 P5DA_I5 GND GND CON2 P4DA_I3 VCC_Itar J7 1 2 IR LED OUTPUT CON2 2 2 RES_BUS9_680K VCC_I 1 TURN SWITCH TO ON POSI TION TO ENAB LE RESISTOR PULL UP ON PORT PINS. 2 3 4 5 6 7 8 9 10 RN4 P4PU_I0 P4PU_I1 P4PU_I2 P4PU_I3 P4PU_I4 P4PU_I5 P4PU_I6 P4PU_I7 S6 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SW DIP-8 P4_I0 P4_I1 P4_I2 P4_I3 P4_I4 P4_I5 P4_I6 P4_I7 VCC_Itar XTAL2_ T XTAL1_ T pg4 pg4 1 1 RES_BUS9_680K ICE MCU Title FOR USER"S MANUAL ONLY Size B SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Document Number Tuesday, August 15, 2000 Sheet E Rev A 5 of 11 Date: A B C D UM005100-IRR0400 Schematic 5 A B C D E 4 L99 MODE: - SET ROM_SIZE_RG = 16K. - T3 IS TRI-STATED. - WHEN DS_I IS ASSERTED: IF (FG/BG && OUTSIDE_ROM) TR-STATE T1. ELSE IF (FG/BG && !OUTSIDE_ROM) ENABLE T1. ELSE IF (!FG/BG) IF (C_JAM_P1) TRI-STATE T1. ELSE ENABLE T1. NOTE: ZDS MUST NOT SET D_MEMFLAG REGISTER DMF_DATA BIT WHEN ACCESSING EXECUTABLE RAM. 4 3 P1_I[0..7] 0-5V BUFFER TRANSLATER 3 3 T3 P1_M[0..7] 5V MOTHERBOARD INTERFACE TARGET CONNECTOR P1_I[0..7] 0-5V ICE MCU AD_Itv[7..0] 0-5V BUFFER TRANSLATER 1 AD_I[7..0] 5V T1 2 2 1 1 Title SCHEMATIC, Z86L EMULATION DAUGHTER BOARD 99 Size B Date: A B C D Document Number Monday, August 14, 2000 Sheet E Rev A 6 of 11 UM005100-IRR0400 Schematic 6 A B C D E pg8,11 AD_I[7..0] AD_I[7..0] AD_I0 AD_I1 AD_I2 AD_I3 AD_I4 AD_I5 AD_I6 AD_I7 A_I8 A_I9 A_I10 A_I11 A_I12 A_I13 A_I14 A_I15 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 1 48 25 24 4 10 15 21 U8 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 1OE 2OE 3OE 4OE GND4 GND10 GND15 GND21 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 VCC7 VCC18 VCC31 VCC42 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 MAD0 MAD1 MAD2 MAD3 MAD4 MAD5 MAD6 MAD7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 MA15 VCC P3 MAD0 MAD2 MAD4 MAD6 MA8 MA10 MA12 MA14 nAS P20 P21 P22 P23 P24 P25 P26 P27 P60 P61 P62 P63 P64 P65 P66 P67 VCC VCC_I (L99 PORT5) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 MAD1 MAD3 MAD5 MAD7 MA9 MA11 MA13 MA15 GND LG_CTCLK VCC P6[0..7] P2[0..7] nAS LG_32_64 nMAS R_W nRESET nDS nMDS nLG_SYNC nLG_IACK LG_FG_BG LG_SCLK LG_nXROF 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 SIGNAL BUFFER U9 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 VCC7 VCC18 VCC31 VCC42 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 1OE 2OE 3OE 4OE 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 1 48 25 24 4 10 15 21 3 4 SIGNAL BUFFER nAS_I R32_64 nMAS_I R_W_I nRST_frI nMDS_I nDS_I nSYNC nIRQ_ACK FG_BG SCLK nEXR_OFF P_CT_CLK R29 10K nAS_I R32_64 nMAS_I R_W_I pg11 pg3 pg11 pg11 4 LOGIC ANALYZER CONNECTOR MA[15..8] MAD[7..0] pg11 A_I[15..8] A_I[15..8] nRST_frI pg11 nMDS_I pg11 nDS_I pg11 nSYNC pg11 nIRQ_ACK pg11 FG_BG pg8 SCLK pg11 nEXR_OFF pg3,11 P_CT_CLK pg8 IDT74FCT16244ATPA pg4,5 3 P2_I[0..7] P2_I[0..7] P2_I0 P2_I1 P2_I2 P2_I3 P2_I4 P2_I5 P2_I6 P2_I7 P6_I0 P6_I1 P6_I2 P6_I3 P6_I4 P6_I5 P6_I6 P6_I7 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 P5_I[0..7] U10 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 GND28 GND4 GND34 GND10 GND39 GND15 GND45 GND21 LG_32_64 nMAS R_W nRESET nDS P20 P22 P24 P26 P60 P62 P64 P66 LG_SCLK P50 P52 P54 P56 P40 P42 P44 P46 LG_SCLK LG_AD_M0 LG_AD_M2 LG_AD_M4 LG_AD_M6 LG_PTBD3 LG_PTBD1 LG_P_CLR LG_WR_RD LG_CTCLK SIGNA L TRA NSLATION nMDS nLG_SYNC nLG_IACK LG_FG_BG LG_nXROF GND P21 P23 P25 P27 P61 P63 P65 P67 GND P51 P53 P55 P57 P41 P43 P45 P47 GND LG_AD_M1 LG_AD_M3 LG_AD_M5 LG_AD_M7 LG_PTBD2 LG_P_CLK LG_nPGM LG_CLKCE GND IDT74FCT16244ATPA (L99 PORT2) (L99 PORT6) P2[0..7] P2[0..7] pg8 SIGN AL BUFFER U11 LG_AD_M0 LG_AD_M1 LG_AD_M2 LG_AD_M3 LG_AD_M4 LG_AD_M5 LG_AD_M6 LG_AD_M7 LG_PTBD3 LG_PTBD2 LG_PTBD1 LG_P_CLK LG_P_CLR LG_nPGM LG_WR_RD LG_CLKCE VCC 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 VCC7 VCC18 VCC31 VCC42 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 1OE 2OE 3OE 4OE 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 1 48 25 24 4 10 15 21 AD_M[7..0] AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 P_TBD3 P_TBD2 P_TBD1 P_CLK P_CLR nP_PGM P_WR_RD P_CLK_CE AD_M[7..0] pg8 pg4,5 P6_I[0..7] P6_I[0..7] VCC (L99 PORT4) 2 IDT74FCT164245TPA pg4,5 P5_I[0..7] U12 P5_I0 P5_I1 P5_I2 P5_I3 P5_I4 P5_I5 P5_I6 P5_I7 P4_I0 P4_I1 P4_I2 P4_I3 P4_I4 P4_I5 P4_I6 P4_I7 VCC 1 SIGNA L TRA NSLATION 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 P50 P51 P52 P53 P54 P55 P56 P57 P40 P41 P42 P43 P44 P45 P46 P47 VCC VCC_I P_TBD3 pg3 P_TBD2 pg3 P_TBD1 pg3 P_CLK pg3 P_CLR pg3 nP_PGM pg3 P_WR_RD pg3 P_CLK_CE pg3 2 GND28 GND4 GND34 GND10 GND39 GND15 GND45 GND21 IDT74FCT16244ATPA LG_AD_M[7..0] P4[0..7] P5[0..7] P4[0..7] P5[0..7] pg4,5 P4_I[0..7] P4_I[0..7] P4[0..7] P5[0..7] pg8 pg8 1 LOGIC ANALYZER CONNECTOR Title IDT74FCT164245TPA FOR USER"S MANUAL ONLY C D SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: Document Number Monday, August 14, 2000 Sheet E Rev A 7 of 11 A B UM005100-IRR0400 Schematic 7 A B C D E 4 4 pg3 A_M[15..8] A_M[15..8] MB INTER FACE CONNECTOR 2 MB INTER FACE CONNECTOR 1 AD_I[7..0] AD_I[7..0] pg7,11 FG_BG pg3,7,11 nMAS_I pg11 C_JAM_P1 pg3 nIRQ_ACK pg11 pg3 pg3 nRST_frM C_DR_ADI VCC VCC P2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 (TRACE) (CH_DIR) C_DR_ADI (TRIGGER) (M_P25) nRST_frM (M_A8) A_M8 (M_A9) A_M9 (M_A10) A_M10 (M_A11) A_M11 (M_A12) A_M12 (M_A13) A_M13 (M_A14) A_M14 (M_A15) A_M15 (SIZE0) (SIZE1) (SIZE2) (SIZE3) (SIZE4) (M_P31) (nCS_RD) P_CLK_CE (nD_E) P_WR_RD (6D0X=>6D0X) P_AH_CLK (6D2X=>6D1X) P_AL_CLK (6D4X=>6D2X) P_CT_CLK (6D6X=>6D3X) LED_CLK (6D8X=>6D4X) P_BUF_WR_CLK (6DAX=>6D5X) (57FX=>6D7X) nWR_DAC nIRQ_ACK (nIACK) C_JAM_P1 (nCS_U245) (nU_AS) nMAS_I (ICRAM) FG_BG AD_I0 (UD0) AD_I1 (UD1) AD_I2 (UD2) AD_I3 (UD3) AD_I4 (UD4) AD_I5 (UD5) AD_I6 (UD6) AD_I7 (UD7) P50 (U_P50) P51 (U_P51) P52 (U_P52) P53 (U_P53) P54 (U_P54) P55 (U_P55) P56 (U_P56) P57 (U_P57) A_I8 (UA8) A_I9 (UA9) A_I10 (UA10) A_I11 (UA11) A_I12 (UA12) A_I13 (UA13) A_I14 (UA14) A_I15 (UA15) (nBRPDRAM) nDM(nBRP_OFF) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 (U_PXX) R_W_I (U_P35) nSYNC SCLK (U_P10) (U_P11) (U_P12) (U_P13) (U_P14) (U_P15) (U_P16) (U_P17) (U_P40) P40 (U_P41) P41 (U_P42) P42 (U_P43) P43 (U_P44) P44 (U_P45) P45 (U_P46) P46 (U_P47) P47 (U_P20) P20 (U_P21) P21 (U_P22) P22 (U_P23) P23 (U_P24) P24 (U_P25) P25 (U_P26) P26 (U_P27) P27 (nBRPPRAM) (nBRP_ROM) pg3 R_W_M pg3 nRST_CT pg3 nAS_M pg3 nDS_M pg3,7,9,10 AD_M[7..0] P1 nAS_M (nM_AS) nDS_M (nM_DS) R_W_M (M_R/W) (nRESET2) nRST_CT AD_M0 (M_D0) AD_M1 (M_D1) AD_M2 (M_D2) AD_M3 (M_D3) AD_M4 (M_D4) AD_M5 (M_D5) AD_M6 (M_D6) AD_M7 (M_D7) (D0) D_P0 (D1) D_P1 (D2) D_P2 (D3) D_P3 (D4) D_P4 (D5) D_P5 (D6) D_P6 (D7) D_P7 (P_TBD0) (nCS) (P_TBD1) (VPP) (P_TBD2) (EPM) (P_TBD3) (VCC_CT) nDS_frI (nU_M_DS) (14V) (57EX=>6D6X) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 R_W_I nSYNC SCLK pg11 pg11 pg11 AD_M[7..0] 3 3 pg10 D_P[7..0] D_P[7..0] P4[0..7] pg7 pg3 nDS_frI P2[0..7] pg7 2 2 pg9 nWR_DAC nDM A_I[15..8] nDM pg3 A_I[15..8] pg11 P5[0..7] pg7 pg3,7 P_CT_CLK pg10 P_AL_CLK pg10 P_AH_CLK pg3 P_WR_RD pg3 P_CLK_CE 1 FOR USER"S MANUAL ONLY MOTHERBOARD INTERFACE Title 1 SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: A B C D Document Number Monday, August 14, 2000 Sheet E Rev A 8 of 11 UM005100-IRR0400 Schematic 8 A B C D E 15V OUTP UT ISR U4 VCC 1 VCC 3 4 PT5042 VIN GND VOUT 3 VCC_15V U19 LT1086CM VIN ADJ VOUT C1 2 R30 121 + C74 22uF C75 0.1UF VCC_reg 1UF C2 1UF + C3 100uF16V 4 + C73 10uF 1 2 VCC_15V R31 73.2 2V - 4V Adjustable Power POWER OP-AMP CIRC UIT R1 2K_1% 3 2 4 U5A 1 LT1014DS C4 + 13 R32 200 R2 2K_1% 3 R3 R4 2K_1% 10K_1% 0.1UF VCC_VV (0-14V) VCC_VV 3 VCC_15V U5B 7 LT1014DS C5 R5 5 6 DAC IC pg8 AD_M[7..0] AD_M[7..0] AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 A_M_LO0 A_M_LO1 pg8 nWR_DAC nWR_DAC 14 13 12 11 10 9 8 7 17 16 15 U6 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 WR MAX506 1 4 5 3 VOUTA VOUTB VOUTC VOUTD VDD VSS DGND AGND VREF 2 1 20 19 18 3 6 5 4 2K_1% DAC_V0 DAC_V1 DAC_V2 DAC_V3 VCC R9 2K_1% 2 6 7 8 R10 2K_1% R12 2K_1% 4 R6 2K_1% R8 2K_1% R7 10K_1% VCC_15V U5C 10 LT1014DS C6 2 13 4 + - 0.1UF (0-14V) VCC_VPP VCC_VPP pg3 A_M_LO[1..0] A_M_LO[1..0] 2.5V REFERE NCE DAC_VREF U7 Vin Vo_2.5 NC1 NC3 NC2 NC4 GND NC5 MC1403D 12 11 2 + 13 LAYO UT NOTE: USE THICK TRACES FOR THESE POWER SOURCES. J6 VCC_reg VCC_I VCC_I VCC_Iint 1 3 5 7 CON8A 2 4 6 8 VCC_reg VCC_Itar VCC_Itar VCC_Iint R11 10K_1% 0.1UF (0-14V) VCC_EPM VCC_EPM USER NOTE: SELECT VO LTAGE SOURCE FOR EMULATION SYSTEM. 1) 2) 3) 4) 5) 6) 7) ICE ICE ICE ICE ICE ICE ICE = = = = = = = VCC_reg 1-3 VCC_reg TARGET = VCC_reg 1-3 , 2-4 VCC_lint 5-7 VCC_lint TARGET = VCC_lint 5-7 , 6-8 VCC_reg TARGET = VCC_lint 1-3 , 6-8 VCC_lint TARGET = VCC_reg 5-7 , 2-4 TARGET 3-4 R13 2K_1% 4 14 15 + 13 VCC_15V R40 200 1W U5D R41 500 16 LT1014DS 1 3 C7 2 Q4 FZT849 1 1 R14 2K_1% R16 2K_1% R15 2K_1% 0.1UF (0 - 5.0V) VCC_Iint + C76 22uF VCC_Iint POWER LOGIC Title FOR USER"S MANUAL ONLY SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: D Document Number Monday, August 14, 2000 Sheet E Rev A 9 of 11 A B C UM005100-IRR0400 Schematic 9 A B C D E HIGH TO LOW & LOW TO HIGH VOLTAGE TRANSLATION pg8 4 HEADERS FOR OTP PROGRAMMING SOCKET ADAPTER D_Ptv[7..0] D_P[7..0] D_P[7..0] D_P0 D_P1 D_P2 D_P3 D_P4 D_P5 D_P6 D_P7 P_CLK_CE P_WR_RD nP_PGM P_CLR P_CLK P_TBD1 P_TBD2 P_TBD3 VCC VCC_I 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 U1 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 D_Ptv0 D_Ptv1 D_Ptv2 D_Ptv3 D_Ptv4 D_Ptv5 D_Ptv6 D_Ptv7 nP_tvCE nP_tvOE nP_tvPGM P_tvCLR P_tvCLK P_tvTBD1 P_tvTBD2 P_tvTBD3 P_RD_WR 4 CONTROL SIGNAL FOR PROGRAMM ING OTP D_Ptv0 D_Ptv2 D_Ptv4 D_Ptv6 pg3 P_CLK_CE pg3 P_WR_RD pg3 nP_PGM pg3 P_CLR pg3 P_CLK pg3 P_TBD1 pg3 P_TBD2 pg3 P_TBD3 P_tvCLR P_tvCLK P_tvTBD2 P_tvTBD3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 J1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 D_Ptv1 D_Ptv3 D_Ptv5 D_Ptv7 HDR15X2 3 3 IDT74FCT164245TPA pg3 P_RD_WR HIGH TO LOW VOLT AGE TRANSLATION 2 OTP REGI STER FOR MSB & LSB OF ADD RESS U3 AD_M[7..0] 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 1CLK 1OE 2CLK 2OE 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 Title IDT74FCT162374ATPV Size B Date: AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 AD_M0 AD_M1 AD_M2 AD_M3 AD_M4 AD_M5 AD_M6 AD_M7 P_AL_CLK P_CLK_CE P_AH_CLK P_CLK_CE P_AL_CLK pg8 P_AH_CLK pg8 1 A_Ptv[15..0] HEADERS FOR OTP PROGRAMMING SOCKET ADAPTER A_Ptv0 A_Ptv2 A_Ptv4 A_Ptv6 A_Ptv8 A_Ptv10 A_Ptv12 A_Ptv14 nP_tvCE nP_tvOE nP_tvPGM P_tvTBD1 J2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 HDR15X2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 A_Ptv1 A_Ptv3 A_Ptv5 A_Ptv7 A_Ptv9 A_Ptv11 A_Ptv13 A_Ptv15 VCC_VPP VCC_EPM VCC_VV VCC_I A_Ptv0 A_Ptv1 A_Ptv2 A_Ptv3 A_Ptv4 A_Ptv5 A_Ptv6 A_Ptv7 A_Ptv8 A_Ptv9 A_Ptv10 A_Ptv11 A_Ptv12 A_Ptv13 A_Ptv14 A_Ptv15 U2 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 AD_M[7..0] pg8 2 A_P0 A_P1 A_P2 A_P3 A_P4 A_P5 A_P6 A_P7 A_P8 A_P9 A_P10 A_P11 A_P12 A_P13 A_P14 A_P15 VCC VCC_I 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 1O1 1O2 1O3 1O4 1O5 1O6 1O7 1O8 2O1 2O2 2O3 2O4 2O5 2O6 2O7 2O8 VCC7 VCC18 VCC31 VCC42 1 FOR USER"S MANUAL ONLY GND28 GND4 GND34 GND10 GND39 GND15 GND45 GND21 PROGRAMMING LOGIC IDT74FCT164245TPA SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Document Number Monday, August 14, 2000 Sheet E Rev A 10 of 11 A B C D UM005100-IRR0400 Schematic 10 A B C D E 4 pg7,8 nIRQ_ACK pg3,7 nRST_frI pg3,7 nAS_I pg3,7,8 SCLK pg3,7,8 nSYNC pg3 P34_nDM pg3,7,8 nMAS_I pg3,7,8 R_W_I pg3,7 nDS_I pg3,7 nMDS_I pg3 nRST_T 4 LOW TO HIGH VOLT AGE TRANSLATION U15 pg4 nRST_Ttv pg4 nMDS_Itv pg4 nDS_Itv pg4 R_W_Itv pg4 nMAS_Itv pg4 P34tv pg4 nSYNCtv pg4 SCLKtv pg4 nAS_Itv pg3,4 nRST_Itv pg4 nIACKtv pg4 nXROFFtv VCC_I R24 3 nRST_Ttv nMDS_Itv nDS_Itv R_W_Itv nMAS_Itv P34tv nSYNCtv SCLKtv nAS_Itv nRST_Itv nIACKtv nXROFFtv 10K 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 nRST_ T nMDS_I nDS_I R_W_I nMAS_I P34_nDM nSYNC SCLK nAS_I nRST_frI nIRQ_ACK U14D VCC_I 12 13 74LVC08A U14C 8 74LVC08A U14B 11 nEXR_OFF nEXR_OFF pg7 9 10 VCC VCC FG_BG VCC_I 4 5 74LVC08A U14A 1 XTAL1_EM 2 74LVC08A 3 6 nDTMRtv nDTMRtv pg4 3 XTAL1tv XTAL1tv pg4 IDT74FCT164245TPA FG_BG pg8 LOW TO HIGH VOLT AGE TRANSLATION pg7,8 AD_I[7..0] pg3,7,8 A_I[15..8] pg4 A_Itv[15..8] 2 AD_I[7..0] A_I[15..8] A_Itv[15..8] A_Itv8 A_Itv9 A_Itv10 A_Itv11 A_Itv12 A_Itv13 A_Itv14 A_Itv15 AD_Itv0 AD_Itv1 AD_Itv2 AD_Itv3 AD_Itv4 AD_Itv5 AD_Itv6 AD_Itv7 VCC 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 1 25 24 4 10 15 21 U16 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 1DIR 2OE 2DIR GND4 GND10 GND15 GND21 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 VCCB1 VCCB2 VCCA1 VCCA2 GND28 GND34 GND39 GND45 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 7 18 31 42 28 34 39 45 VOLTAGE TRANSLATOR A_I8 A_I9 A_I10 A_I11 A_I12 A_I13 A_I14 A_I15 AD_I0 AD_I1 AD_I2 AD_I3 AD_I4 AD_I5 AD_I6 AD_I7 VCC 7 VCC_I GND2 OUT2 8 2 pg4 AD_Itv[7..0] AD_Itv[7..0] SOCKET F OR ICE MCU OSCILLATO R VCC Y1 1 4 NC GND1 VCC OUT1 14 5 pg3 pg3 nAD_I_OE I_WR_RD nAD_I_OE I_WR_RD 8MHZ_FS 1 1 IDT74FCT164245TPA FOR USER"S MANUAL ONLY Title SCHEMATIC, Z86L9EMULATION DAUGHTER BOARD 9 Size B Date: Document Number Monday, August 14, 2000 Sheet E Rev A 11 of 11 A B C D UM005100-IRR0400 Schematic 11 |
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